EARS - Principles and Patterns

Easy Approach to Requirements Syntax (EARS)

EARS Patterns (5 Types)

  • Ubiquitous: The system shall \<response\>. Used for behaviors that are always true.
  • Event‑Driven: When \<trigger\>, the system shall \<response\>. Triggered by a specific event.
  • State‑Driven: While \<state\>, the system shall \<response\>. Applies only during a defined condition or mode.
  • Optional Feature: If \<feature\> is enabled, the system shall \<response\>. Used when a feature may or may not be present.
  • Unwanted Behavior: If \<undesired condition\>, the system shall \<response\>. Defines behavior when something goes wrong.

Five Rules for Good Requirements

  1. One requirement = one behavior No compound actions. No “and/or”.
  2. Use the correct pattern Match the situation: ubiquitous, event‑driven, state‑driven, optional, unwanted.
  3. Follow the grammar exactly Don’t improvise structure or add nested conditions.
  4. Use concrete, observable language Avoid vague terms (fast, robust, adequate). Make it testable.
  5. Avoid logical operators inside the response clause If you need “and”, “or”, “except”, split into multiple requirements.

Examples

1. Ubiquitous Requirements (Always true, no triggering condition)

    • The module shall support operation across the temperature range defined in VITA tbd for its assigned ruggedization level.
    • The backplane shall provide alignment features that comply with VITA tbd mechanical keying.

2. Event‑Driven Requirements (Triggered by an event)

    • When the module detects an over‑temperature condition, it shall assert the thermal warning signal within 10 ms.
    • When the system manager receives a FRU inventory update, it shall log the change using the VITA tbd event format.

3. State‑Driven Requirements (Triggered by a system state)

    • While the system is in standby mode, the management controller shall maintain 3.3 V_AUX power within ±5%.
    • While the link is in training state, the VPX fabric interface shall follow the initialization sequence defined in VITA tbd.

4. Optional Feature Requirements (Triggered only if a feature is present)

    • If the module implements PCIe Gen4, it shall support lane reversal as defined in the PCIe Base Specification.
    • If the backplane provides a radial clock, the payload card shall accept the signal within the skew limits defined in VITA tnd.

5. Unwanted Behavior Requirements (Preventing something from happening)

    • The module shall not exceed the maximum inrush current specified in VITA tbd during startup.
    • The connector shall not permit mating with incompatible keying profiles.

6. Complex Requirements (Multiple conditions, structured clearly)

    • When the system transitions from cold start to operational state, and the payload card requests fabric initialization, the system manager shall sequence power rails according to VITA tbd and then enable the VPX fabric links within 50 ms.
    • If the module supports both Ethernet and PCIe fabrics, and the backplane provides multi‑plane routing, the module shall advertise its fabric capabilities using the VITA tbd discovery protocol.